The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2013
Filed:
Dec. 23, 2009
Joseph M. Steigerwald, Forest Grove, OR (US);
Nick Lindert, Beaverton, OR (US);
Steven J. Keating, Beaverton, OR (US);
Christopher J. Jezewski, Hillsboro, OR (US);
Timothy E. Glassman, Portland, OR (US);
Joseph M. Steigerwald, Forest Grove, OR (US);
Nick Lindert, Beaverton, OR (US);
Steven J. Keating, Beaverton, OR (US);
Christopher J. Jezewski, Hillsboro, OR (US);
Timothy E. Glassman, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods to form memory devices having a MIM capacitor with a recessed electrode are described. In one embodiment, a method of forming a MIM capacitor with a recessed electrode includes forming an excavated feature defined by a lower portion that forms a bottom and an upper portion that forms sidewalls of the excavated feature. The method includes depositing a lower electrode layer in the feature, depositing an electrically insulating layer on the lower electrode layer, and depositing an upper electrode layer on the electrically insulating layer to form the MIM capacitor. The method includes removing an upper portion of the MIM capacitor to expose an upper surface of the electrode layers and then selectively etching one of the electrode layers to recess one of the electrode layers. This recess isolates the electrodes from each other and reduces the likelihood of a current leakage path between the electrodes.