The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2013

Filed:

Apr. 11, 2012
Applicants:

Rajiv Dunne, Murphy, TX (US);

Gary P. Morrison, Garland, TX (US);

Satyendra S. Chauhan, Sugarland, TX (US);

Masood Murtuza, Sugarland, TX (US);

Thomas D. Bonifield, Dallas, TX (US);

Inventors:

Rajiv Dunne, Murphy, TX (US);

Gary P. Morrison, Garland, TX (US);

Satyendra S. Chauhan, Sugarland, TX (US);

Masood Murtuza, Sugarland, TX (US);

Thomas D. Bonifield, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a semiconductor device includes an integrated circuit (IC) die which is provided with a substrate with surfaces. At least one through substrate via (TSV) is formed through the substrate to a protruding integral tip that includes sidewalls and a distal end. A metal layer is formed on the bottom surface of the IC die, and the sidewalls and the distal end of the protruding integral tips. Completing fabrication of at least one functional circuit including at least one ground pad on the top surface of the semiconductor, wherein the ground pad is coupled to said TSV.


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