The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2013
Filed:
Sep. 30, 2010
William H Leavitt, Haverhill, MA (US);
Theodore H Smick, Essex, MA (US);
Joseph Daniel Gillespie, Boston, MA (US);
William H Park, Somerville, MA (US);
Paul Eide, Stratham, NH (US);
Drew Arnold, Salem, MA (US);
Geoffrey Ryding, Manchester, MA (US);
William H Leavitt, Haverhill, MA (US);
Theodore H Smick, Essex, MA (US);
Joseph Daniel Gillespie, Boston, MA (US);
William H Park, Somerville, MA (US);
Paul Eide, Stratham, NH (US);
Drew Arnold, Salem, MA (US);
Geoffrey Ryding, Manchester, MA (US);
GTAT Corporation, Nashua, NH (US);
Abstract
An ion implanter has an implant wheel with a plurality of wafer carriers distributed about a periphery of the wheel. Each wafer carrier has a heat sink for removing heat from a wafer on the carrier during the implant process by thermal contact between the wafer and the heat sink. The wafer carriers have wafer retaining fences formed as cylindrical rollers with axes in the respective wafer support planes of the wafer carriers. The cylindrical surfaces of the rollers provide wafer abutment surfaces which can move transversely to the wafer support surfaces so that no transverse loading is applied by the fences to wafer edges as the wafer is pushed against the heat sink by centrifugal force. The wafer support surfaces comprise layers of elastomeric material and the movable abutment surfaces of the fences allow even thermal coupling with the heat sink over the whole area of the wafer.