The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8426325 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 23, 2013

Filed:

Jul. 06, 2011
Applicants:

LI Wang, Nanchang, CN;

Fengyi Jiang, Nanchang, CN;

Inventors:

Li Wang, Nanchang, CN;

Fengyi Jiang, Nanchang, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
Abstract

One embodiment of the present invention provides a process for obtaining high-quality boundaries for individual multilayer structures which are fabricated on a trench-partitioned substrate. During operation, the process receives a trench-partitioned substrate wherein the substrate surface is partitioned into arrays of isolated deposition platforms which are separated by arrays of trenches. The process then forms a multilayer structure, which comprises a first doped layer, an active layer, and a second doped layer, on one of the deposition platforms. Next, the process removes sidewalls of the multilayer structure.


Find Patent Forward Citations

Wang, Li. (2013). Method for obtaining high-quality boundary for semiconductor devices fabricated on a partitioned substrate (U.S. Patent No. 8426325). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8426325

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