The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2013
Filed:
Nov. 24, 2010
Huang-yu Chen, Zhudong Township, Hsinchu County, TW;
Fang-yu Fan, Hukou Township, Hsinchu County, TW;
Yuan-te Hou, Hsinchu, TW;
Lee-chung LU, Taipei, TW;
Ru-gun Liu, Hsinchu, TW;
Ken-hsien Hsieh, Taipei, TW;
Lee Fung Song, Banciao, TW;
Wen-chun Huang, Tainan County, TW;
Li-chun Tien, Tainan, TW;
Huang-Yu Chen, Zhudong Township, Hsinchu County, TW;
Fang-Yu Fan, Hukou Township, Hsinchu County, TW;
Yuan-Te Hou, Hsinchu, TW;
Lee-Chung Lu, Taipei, TW;
Ru-Gun Liu, Hsinchu, TW;
Ken-Hsien Hsieh, Taipei, TW;
Lee Fung Song, Banciao, TW;
Wen-Chun Huang, Tainan County, TW;
Li-Chun Tien, Tainan, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method and apparatus for achieving multiple patterning compliant technology design layouts is provided. An exemplary method includes providing a routing grid having routing tracks; designating each of the routing tracks one of at least two colors; applying a pattern layout having a plurality of features to the routing grid, wherein each of the plurality of features corresponds with at least one routing track; and applying a feature splitting constraint to determine whether the pattern layout is a multiple patterning compliant layout. If the pattern layout is not a multiple patterning compliant layout, the pattern layout may be modified until a multiple patterning compliant layout is achieved. If the pattern layout is a multiple patterning compliant layout, the method includes coloring each of the plurality of features based on the color of each feature's corresponding at least one routing track, thereby forming a colored pattern layout, and generating at least two masks with the features of the colored pattern layout. Each mask includes features of a single color.