The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8405222 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 26, 2013

Filed:

Jun. 28, 2010
Applicants:

Hong Yu, Singapore, SG;

Huang Liu, Singapore, SG;

Feng Zhao, Singapore, SG;

Meisheng Zhou, Singapore, SG;

Liang-choo Hsia, Singapore, SG;

Inventors:

Hong Yu, Singapore, SG;

Huang Liu, Singapore, SG;

Feng Zhao, Singapore, SG;

Meisheng Zhou, Singapore, SG;

Liang-Choo Hsia, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacture of an integrated circuit system includes: forming an etch stop layer over a bulk substrate; forming a buffer layer on the etch stop layer; forming a hard mask on the buffer layer; forming a through silicon via through the etch stop layer with the hard mask detected and the buffer layer removed with a low down force; and forming a passivation layer on the through silicon via and the etch stop layer.


Find Patent Forward Citations

Yu, Hong. (2013). Integrated circuit system with via and method of manufacture thereof (U.S. Patent No. 8405222). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8405222

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