The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 05, 2013
Filed:
Aug. 31, 2010
Yi-shao Lai, Kaohsiung, TW;
Tsung-yueh Tsai, Kaohsiung, TW;
Ming-kun Chen, Kaohsiung, TW;
Hsiao-chuan Chang, Kaohsiung, TW;
Ming-hsiang Cheng, Kaohsiung, TW;
Yi-Shao Lai, Kaohsiung, TW;
Tsung-Yueh Tsai, Kaohsiung, TW;
Ming-Kun Chen, Kaohsiung, TW;
Hsiao-Chuan Chang, Kaohsiung, TW;
Ming-Hsiang Cheng, Kaohsiung, TW;
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Abstract
The present invention relates to a semiconductor package having at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface upon which the first metal bumps are disposed and a plurality of first signal coupling pads disposed adjacent to the first active surface. The second layer chip is electrically connected to the first layer chip, and includes a second active surface that faces the first active surface and a plurality of second signal coupling pads. The second signal coupling pads are capacitively coupled to the first signal coupling pads so as to provide proximity communication between the first layer chip and the second layer chip. The package body encapsulates the first layer chip, the first metal bumps, and the second layer chip, and the first metal bumps are partially exposed.