The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8361859 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 29, 2013

Filed:

Nov. 09, 2010
Applicants:

Thomas N. Adam, Slingerlands, NY (US);

Stephen W. Bedell, Wappingers Falls, NY (US);

Abhishek Dube, Fishkill, NY (US);

Eric C. T. Harley, Lagrangeville, NY (US);

Judson R. Holt, Wappingers Falls, NY (US);

Alexander Reznicek, Mount Kisco, NY (US);

Devendra K. Sadana, Pleasantville, NY (US);

Dominic J. Schepis, Wappingers Falls, NY (US);

Matthew W. Stoker, Poughkeepsie, NY (US);

Keith H. Tabakman, Fishkill, NY (US);

Inventors:

Thomas N. Adam, Slingerlands, NY (US);

Stephen W. Bedell, Wappingers Falls, NY (US);

Abhishek Dube, Fishkill, NY (US);

Eric C. T. Harley, Lagrangeville, NY (US);

Judson R. Holt, Wappingers Falls, NY (US);

Alexander Reznicek, Mount Kisco, NY (US);

Devendra K. Sadana, Pleasantville, NY (US);

Dominic J. Schepis, Wappingers Falls, NY (US);

Matthew W. Stoker, Poughkeepsie, NY (US);

Keith H. Tabakman, Fishkill, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
Abstract

An embedded, strained epitaxial semiconductor material, i.e., an embedded stressor element, is formed at the footprint of at least one pre-fabricated field effect transistor that includes at least a patterned gate stack, a source region and a drain region. As a result, the metastability of the embedded, strained epitaxial semiconductor material is preserved and implant and anneal based relaxation mechanisms are avoided since the implants and anneals are performed prior to forming the embedded, strained epitaxial semiconductor material.


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