The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2012
Filed:
Jun. 28, 2010
Li-wen Chang, Sanxia Township, Taipei County, TW;
Der-chyang Yeh, Hsin-Chu, TW;
Chung-yi Yu, Hsin-Chu, TW;
Hsun-chung Kuang, Yang-Mei, TW;
Hua-chou Tseng, Hsin-Chu, TW;
Chih-ping Chao, Hsinchu, TW;
Ming Chyi Liu, Hsinchu, TW;
Yuan-tai Tseng, Lugu Township, Nantou County, TW;
Li-Wen Chang, Sanxia Township, Taipei County, TW;
Der-Chyang Yeh, Hsin-Chu, TW;
Chung-Yi Yu, Hsin-Chu, TW;
Hsun-Chung Kuang, Yang-Mei, TW;
Hua-Chou Tseng, Hsin-Chu, TW;
Chih-Ping Chao, Hsinchu, TW;
Ming Chyi Liu, Hsinchu, TW;
Yuan-Tai Tseng, Lugu Township, Nantou County, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
Methods of fabricating an integrated circuit device, such as a thin film resistor, are disclosed. An exemplary method includes providing a semiconductor substrate; forming a resistive layer over the semiconductor substrate; forming a hard mask layer over the resistive layer, wherein the hard mask layer includes a barrier layer over the resistive layer and a dielectric layer over the barrier layer; and forming an opening in the hard mask layer that exposes a portion of the resistive layer.