The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2012

Filed:

Aug. 23, 2005
Applicants:

Wade J. Hodge, Bolton, VT (US);

Alvin J. Joseph, Williston, VT (US);

Rajendran Krishnasamy, Essex Junction, VT (US);

Qizhi Liu, Essex Junction, VT (US);

Bradley A. Orner, Colchester, VT (US);

Inventors:

Wade J. Hodge, Bolton, VT (US);

Alvin J. Joseph, Williston, VT (US);

Rajendran Krishnasamy, Essex Junction, VT (US);

Qizhi Liu, Essex Junction, VT (US);

Bradley A. Orner, Colchester, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/737 (2006.01);
U.S. Cl.
CPC ...
Abstract

A heterojunction bipolar transistor (HBT), an integrated circuit (IC) chip including at least one HBT and a method of forming the IC. The HBT includes an extrinsic base with one or more buried interstitial barrier layer. The extrinsic base may be heavily doped with boron and each buried interstitial barrier layer is doped with a dopant containing carbon, e.g., carbon or SiGe:C. The surface of the extrinsic base may be silicided.


Find Patent Forward Citations

Hodge, Wade. (2012). Silicon germanium heterojunction bipolar transistor having interstitial trapping layer in base region (U.S. Patent No. 8299500). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8299500

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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