The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2012
Filed:
Jun. 25, 2010
Xinhai Han, Sunnyvale, CA (US);
Nagarajan Rajagopalan, Santa Clara, CA (US);
Ji AE Park, Santa Clara, CA (US);
Bencherki Mebarki, Santa Clara, CA (US);
Heung Lak Park, Santa Clara, CA (US);
Bok Hoen Kim, San Jose, CA (US);
Xinhai Han, Sunnyvale, CA (US);
Nagarajan Rajagopalan, Santa Clara, CA (US);
Ji Ae Park, Santa Clara, CA (US);
Bencherki Mebarki, Santa Clara, CA (US);
Heung Lak Park, Santa Clara, CA (US);
Bok Hoen Kim, San Jose, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.