The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2012

Filed:

Sep. 17, 2010
Applicants:

Rabindra N. Das, Vestal, NY (US);

Voya R. Markovich, Endwell, NY (US);

James J. Mcnamara, Jr., Vestal, NY (US);

Mark D. Poliks, Vestal, NY (US);

Inventors:

Rabindra N. Das, Vestal, NY (US);

Voya R. Markovich, Endwell, NY (US);

James J. McNamara, Jr., Vestal, NY (US);

Mark D. Poliks, Vestal, NY (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/22 (2006.01); H01L 23/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.


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