The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2012
Filed:
Jul. 05, 2006
Sripad Sheshagiri Nagarad, Singapore, SG;
Hwa Weng Koh, Singapore, SG;
Dong Kyun Sohn, Singapore, SG;
Xiaoyu Chen, Singapore, SG;
Louis Lim, Singapore, SG;
Sung Mun Jung, Singapore, SG;
Chiew Wah Yap, Singapore, SG;
Pradeep Ramachandramurthy Yelehanka, Singapore, SG;
Nitin Kamat, Singapore, SG;
Sripad Sheshagiri Nagarad, Singapore, SG;
Hwa Weng Koh, Singapore, SG;
Dong Kyun Sohn, Singapore, SG;
Xiaoyu Chen, Singapore, SG;
Louis Lim, Singapore, SG;
Sung Mun Jung, Singapore, SG;
Chiew Wah Yap, Singapore, SG;
Pradeep Ramachandramurthy Yelehanka, Singapore, SG;
Nitin Kamat, Singapore, SG;
GLOBALFOUNDRIES Singapore Pte. Ltd., Singapore, SG;
Abstract
An integrated circuit method for manufacturing an integrated circuit system including loading a wafer into a processing chamber and pre-purging the processing chamber with a first ammonia gas. Depositing a first nitride layer over the wafer and purging the processing chamber with a second ammonia gas. Depositing a second nitride layer over the first nitride layer that is misaligned with the first nitride layer. Post-purging the processing chamber with a third ammonia gas and purging the processing chamber with a nitrogen gas.