The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2012
Filed:
May. 20, 2010
Sung-chieh Lin, Hsinchu, TW;
Kuoyuan (Peter) Hsu, San Jose, CA (US);
Jiann-tseng Huang, Hsinchu, TW;
We-li Liao, Taichung, TW;
Sung-Chieh Lin, Hsinchu, TW;
Kuoyuan (Peter) Hsu, San Jose, CA (US);
Jiann-Tseng Huang, Hsinchu, TW;
We-Li Liao, Taichung, TW;
Abstract
An OTP memory array includes a bit line coupled to a plurality of memory banks. Each memory bank includes a plurality of memory cells, a footer, and a bias device, and is associated with a current mirror. When a memory cell is activated (e.g., for reading) the memory bank including the activated memory cell is referred to as an activated memory bank and other banks are referred to as deactivated memory banks. A current tracking device serves to compensate for bit line leakage current in deactivated memory cells in the activated memory bank. Further, footers and bias devices in deactivated memory banks and associated current mirrors are configured to reduce/eliminate bit line current leakage through deactivated memory cells in deactivated memory banks.