The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2012

Filed:

Apr. 22, 2009
Applicants:

Hong-dyi Chang, Taipei, TW;

Pei-chao Su, Zhudong Town, Hsinchu County, TW;

Kong-beng Thei, Hsin-Chu County, TW;

Hun-jan Tao, Hsinchu, TW;

Harry Hak-lay Chuang, Hsin-Chu, TW;

Inventors:

Hong-Dyi Chang, Taipei, TW;

Pei-Chao Su, Zhudong Town, Hsinchu County, TW;

Kong-Beng Thei, Hsin-Chu County, TW;

Hun-Jan Tao, Hsinchu, TW;

Harry Hak-Lay Chuang, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a semiconductor device is disclosed. The method includes providing a substrate; forming at least one gate structure over the substrate; forming a plurality of doped regions in the substrate; forming an etch stop layer over the substrate; removing a first portion of the etch stop layer, wherein a second portion of the etch stop layer remains over the plurality of doped regions; forming a hard mask layer over the substrate; removing a first portion of the hard mask layer, wherein a second portion of the hard mask layer remains over the at least one gate structure; and forming a first contact through the second portion of the hard mask layer to the at least one gate structure, and a second contact through the second portion of the etch stop layer to the plurality of doped regions.


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