The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2012
Filed:
Mar. 23, 2010
Jong Ho Yang, Gyeonggi-do, KR;
Hyung-rae Lee, Seoul, KR;
Jin-ping Han, Fishkill, NY (US);
Chung Woh Lai, Singapore, SG;
Henry K. Utomo, Newburgh, NY (US);
Thomas W. Dyer, Pleasant Valley, NY (US);
Jong Ho Yang, Gyeonggi-do, KR;
Hyung-rae Lee, Seoul, KR;
Jin-Ping Han, Fishkill, NY (US);
Chung Woh Lai, Singapore, SG;
Henry K. Utomo, Newburgh, NY (US);
Thomas W. Dyer, Pleasant Valley, NY (US);
Samsung Electronics Co., Ltd., , KR;
Chartered Semiconductor Manufacturing Ltd., Singapore, SG;
International Business Machines Corporation, Armonk, NY (US);
Abstract
Methods of forming p-channel MOSFETs use halo-implant steps that are performed relatively early in the fabrication process. These methods include forming a gate electrode having first sidewall spacers thereon, on a semiconductor substrate, and then forming a sacrificial sidewall spacer layer on the gate electrode. A mask layer then patterned on the gate electrode. The sacrificial sidewall spacer layer is selectively etched to define sacrificial sidewall spacers on the first sidewall spacers, using the patterned mask layer as an etching mask. A PFET halo-implant of dopants is then performed into portions of the semiconductor substrate that extend adjacent the gate electrode, using the sacrificial sidewall spacers as an implant mask. Following this implant step, source and drain region trenches are etched into the semiconductor substrate, on opposite sides of the gate electrode. These source and drain region trenches are then filled by epitaxially growing SiGe source and drain regions therein.