The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2012

Filed:

Jun. 25, 2010
Applicants:

Oseob Jeon, Seoul, KR;

Yoonhwa Choi, Inchun, KR;

Boon Huan Gooi, Penang, MY;

Maria Cristina B. Estacio, Cebu, PH;

Rajeev Joshi, Cupertino, CA (US);

Chung-lin Wu, San Jose, CA (US);

Venkat Iyer, Cupertino, CA (US);

Byoung-ok Lee, Kyonggido, KR;

Inventors:

Oseob Jeon, Seoul, KR;

Yoonhwa Choi, Inchun, KR;

Boon Huan Gooi, Penang, MY;

Maria Cristina B. Estacio, Cebu, PH;

Rajeev Joshi, Cupertino, CA (US);

Chung-Lin Wu, San Jose, CA (US);

Venkat Iyer, Cupertino, CA (US);

Byoung-Ok Lee, Kyonggido, KR;

Assignee:

Fairchild Semiconductor Corporation, South Portland, ME (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Semiconductor die packages are disclosed. An exemplary semiconductor die package includes a premolded substrate. The premolded substrate can have a semiconductor die attached to it, and an encapsulating material may be disposed over the semiconductor die.


Find Patent Forward Citations

Jeon, Oseob. (2012). Semiconductor die package and method for making the same (U.S. Patent No. 8183088). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8183088

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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