The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2012
Filed:
Oct. 20, 2008
Tetsuya Ishikawa, Saratoga, CA (US);
Rick J. Roberts, San Jose, CA (US);
Helen R. Armer, Cupertino, CA (US);
Leon Volfovski, Mountain View, CA (US);
Jay D. Pinson, San Jose, CA (US);
Michael Rice, Pleasanton, CA (US);
David H. Quach, San Jose, CA (US);
Mohsen S. Salek, Saratoga, CA (US);
Robert Lowrance, Los Gatos, CA (US);
John A. Backer, San Jose, CA (US);
William Tyler Weaver, Austin, TX (US);
Charles Carlson, Cedar Park, TX (US);
Chongyang Wang, San Jose, CA (US);
Jeffrey Hudgens, San Francisco, CA (US);
Harald Herchen, Los Altos, CA (US);
Brian LU, Mountain View, CA (US);
Tetsuya Ishikawa, Saratoga, CA (US);
Rick J. Roberts, San Jose, CA (US);
Helen R. Armer, Cupertino, CA (US);
Leon Volfovski, Mountain View, CA (US);
Jay D. Pinson, San Jose, CA (US);
Michael Rice, Pleasanton, CA (US);
David H. Quach, San Jose, CA (US);
Mohsen S. Salek, Saratoga, CA (US);
Robert Lowrance, Los Gatos, CA (US);
John A. Backer, San Jose, CA (US);
William Tyler Weaver, Austin, TX (US);
Charles Carlson, Cedar Park, TX (US);
Chongyang Wang, San Jose, CA (US);
Jeffrey Hudgens, San Francisco, CA (US);
Harald Herchen, Los Altos, CA (US);
Brian Lu, Mountain View, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
An apparatus for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that has an increased system throughput, increased system reliability, a smaller system footprint, and a more repeatable wafer history. Embodiments provide for a cluster tool comprising first and second processing racks, each having two or more vertically stacked substrate processing chambers, a first robot assembly able to access the first processing rack from a first side, a second robot assembly able to access the first processing rack from a second side and the second processing rack from a first side, a third robot assembly able to access the second processing rack from a second side, and a fourth robot assembly able to access the first and second processing racks and to load substrates in a cassette.