The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2012

Filed:

Jun. 20, 2006
Applicants:

Chi-shih Chang, Hsinchu, TW;

Ra-min Tain, Hsinchu, TW;

Shyi-ching Liau, Hsinchu, TW;

Wei-chung Lo, Hsinchu, TW;

Rong-shen Lee, Hsinchu, TW;

Inventors:

Chi-Shih Chang, Hsinchu, TW;

Ra-Min Tain, Hsinchu, TW;

Shyi-Ching Liau, Hsinchu, TW;

Wei-Chung Lo, Hsinchu, TW;

Rong-Shen Lee, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A novel three dimensional wafer stack and the manufacturing method therefor are provided. The three dimensional wafer stack includes a first wafer having a first substrate and a first device layer having thereon at least one chip, a second wafer disposed above the first wafer and having a second substrate, and at least one pedestal arranged between and extending from the first substrate to the second substrate. The pedestal arranged in the device layer is used for preventing the low-k materials existing in the device layer from being damaged by the stresses.


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