The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8158511 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 17, 2012

Filed:

May. 20, 2011
Applicants:

Tony Chiang, Mountain View, CA (US);

Gongda Yao, Fremont, CA (US);

Peijun Ding, San Jose, CA (US);

Fusen E. Chen, Cupertino, CA (US);

Barry L. Chin, Saratoga, CA (US);

Gene Y. Kohara, Fremont, CA (US);

Zheng Xu, Foster City, CA (US);

Hong Zhang, Fremont, CA (US);

Inventors:

Tony Chiang, Mountain View, CA (US);

Gongda Yao, Fremont, CA (US);

Peijun Ding, San Jose, CA (US);

Fusen E. Chen, Cupertino, CA (US);

Barry L. Chin, Saratoga, CA (US);

Gene Y. Kohara, Fremont, CA (US);

Zheng Xu, Foster City, CA (US);

Hong Zhang, Fremont, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of depositing a metal seed layer with underlying barrier layer on a wafer substrate comprising a plurality of recessed device features. A first portion of the barrier layer is deposited on the wafer substrate without excessive build-up of barrier layer material on the openings to the plurality of recessed device features, while obtaining bottom coverage without substantial sputtering of the bottom surface. Subsequently, a metal seed layer is deposited using the same techniques used to deposit the barrier layer, to avoid excessive build up of metal seed layer material on the openings to the features, with minimal sputtering of the barrier layer surface.


Find Patent Forward Citations

Chiang, Tony. (2012). Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features (U.S. Patent No. 8158511). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8158511

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…