The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2012
Filed:
May. 08, 2009
Thomas D. Bonifield, Dallas, TX (US);
Gary P. Morrison, Garland, TX (US);
Rajiv Dunne, Murphy, TX (US);
Satyendra S. Chauhan, Sugarland, TX (US);
Masood Murtuza, Sugarland, TX (US);
Thomas D. Bonifield, Dallas, TX (US);
Gary P. Morrison, Garland, TX (US);
Rajiv Dunne, Murphy, TX (US);
Satyendra S. Chauhan, Sugarland, TX (US);
Masood Murtuza, Sugarland, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A packaged electronic device includes a leadframe including a die pad, a first, second, and third lead pin surrounding the die pad. An IC die is assembled in a face-up configuration on the lead frame. The IC die includes a substrate having an active top surface and a bottom surface, wherein the top surface includes integrated circuitry including an input pad, an output pad, a power supply pad, and a ground pad, and a plurality of through-substrate vias (TSVs) including an electrically conductive filler material and a dielectric liner. The TSVs couple the input pad to the first lead pin, the output pad to the second lead pin, the power supply pad to a third lead pin or a portion of the die pad. A fourth TSV couples pads coupled to the ground node to the die pad or a portion of the die pad for a split die pad.