The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2012

Filed:

Apr. 29, 2010
Applicants:

Chun-hsien Huang, Jiali Township, Tainan County, TW;

Ming-jui Chen, Tainan, TW;

Te-hung Wu, Xinshi Township, Tainan County, TW;

Yu-shiang Yang, Madou Township, Tainan County, TW;

Inventors:

Chun-Hsien Huang, Jiali Township, Tainan County, TW;

Ming-Jui Chen, Tainan, TW;

Te-Hung Wu, Xinshi Township, Tainan County, TW;

Yu-Shiang Yang, Madou Township, Tainan County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method to compensate optical proximity correction adapted for a photolithography process is provided. An integrated circuit (IC) layout firstly is provided. The IC layout includes active regions and a shallow trench isolation (STI) region. The STI region is a region except the active regions. The IC layout further includes ion implant regions which are overlapped with a part of the STI region and at least a part of the active regions. Subsequently, at least a photoresist line width compensation region is acquired in a photoresist covering region outside the ion implant regions according to the IC layout. Each photoresist line width compensation region is disposed in the STI region. Afterwards, the IC layout is corrected according to a width of the photoresist line width compensation region, a length of a side of the active region facing a side of the photoresist line width compensation region and a distance from the side of the photoresist line width compensation region to the active region facing the side. Finally, the corrected IC layout is transferred to a photomask.


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