The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2012

Filed:

Sep. 22, 2008
Applicants:

Byung Tai DO, Singapore, SG;

Sang-ho Lee, Yeoju, KR;

Jong Wook Ju, Icheon-si, KR;

Inventors:

Byung Tai Do, Singapore, SG;

Sang-Ho Lee, Yeoju, KR;

Jong Wook Ju, Icheon-si, KR;

Assignee:

STATS ChipPAC Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01); H01L 23/02 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit package system includes: providing a substrate; attaching a base die to the substrate, the base die having a relief region with a shaped cross-section; and connecting a bond wire between an active base surface of the base die and the substrate, the bond wire extending through the shaped cross-section of the relief region.


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Quick Actions:

Do, Byung. (2012). Integrated circuit package system including die having relieved active region (U.S. Patent No. 8143102). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8143102

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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