The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2012
Filed:
Oct. 27, 2009
Constantin Bulucea, Milpitas, CA (US);
Fu-cheng Wang, San Jose, CA (US);
Prasad Chaparala, Sunnyvale, CA (US);
Constantin Bulucea, Milpitas, CA (US);
Fu-Cheng Wang, San Jose, CA (US);
Prasad Chaparala, Sunnyvale, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
Fabrication of an insulated-gate field-effect transistor () entails separately introducing three body-material dopants, typically through an opening in a mask, into body material () of a semiconductor body so as to reach respective maximum dopant concentrations at three different vertical locations in the body material. A gate electrode () is subsequently defined after which a pair of source/drain zones (and), each having a main portion (M orM) and a more lightly doped lateral extension (E orE), are formed in the semiconductor body. An anneal is performed during or subsequent to introduction of semiconductor dopant that defines the source/drain zones. The body material is typically provided with at least one more heavily doped halo pocket portion (and) along the source/drain zones. The vertical dopant profile resulting from the body-material dopants alleviates punchthrough and reduces current leakage.