The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2011
Filed:
Dec. 03, 2009
Ji-wang Lee, Gyeonggi-do, KR;
Yong-ju Kim, Gyeonggi-do, KR;
Sung-woo Han, Gyeonggi-do, KR;
Hee-woong Song, Gyeonggi-do, KR;
Ic-su OH, Gyeonggi-do, KR;
Hyung-soo Kim, Gyeonggi-do, KR;
Tae-jin Hwang, Gyeonggi-do, KR;
Hae-rang Choi, Gyeonggi-do, KR;
Jae-min Jang, Gyeonggi-do, KR;
Chang-kun Park, Gyeonggi-do, KR;
Ji-Wang Lee, Gyeonggi-do, KR;
Yong-Ju Kim, Gyeonggi-do, KR;
Sung-Woo Han, Gyeonggi-do, KR;
Hee-Woong Song, Gyeonggi-do, KR;
Ic-Su Oh, Gyeonggi-do, KR;
Hyung-Soo Kim, Gyeonggi-do, KR;
Tae-Jin Hwang, Gyeonggi-do, KR;
Hae-Rang Choi, Gyeonggi-do, KR;
Jae-Min Jang, Gyeonggi-do, KR;
Chang-Kun Park, Gyeonggi-do, KR;
Hynix Semiconductor Inc., Gyeonggi-do, KR;
Abstract
A sampling circuit for use in a semiconductor device, includes a first sampling unit configured to sample a data signal in synchronism with a reference clock signal and output a first output signal, a second sampling unit configured to sample a delayed data signal in synchronism with the reference clock signal and output a second output signal, and an output unit configured to combine the first and second output signals and output a sampling data signal.