The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2011

Filed:

Sep. 26, 2008
Applicants:

Daesik Choi, Seoul, KR;

Deokkyung Yang, Hanam-si, KR;

Seung Won Kim, Ichon-si, KR;

Inventors:

DaeSik Choi, Seoul, KR;

DeokKyung Yang, Hanam-si, KR;

Seung Won Kim, Ichon-si, KR;

Assignee:

Stats Chippac Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor package system includes: providing a top package, a through silicon via interposer embedded in the top package; providing a bottom package having a bottom semiconductor die with a top connection adjacent the center active face thereof, a substrate interposer being embedded in the bottom package, the bottom semiconductor die being attached to the substrate interposer; and attaching the top package to the bottom package, the top package having the through silicon via interposer having a via connected to the top connection.


Find Patent Forward Citations

Quick Actions:

Choi, DaeSik. (2011). Semiconductor package system with through silicon via interposer (U.S. Patent No. 8063475). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8063475

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