The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2011
Filed:
Dec. 18, 2006
Chung-hu KE, Taipei, TW;
Chih-hsin Ko, Fongshan, TW;
Hung-wei Chen, Hsinchu, TW;
Wen-chin Lee, Hsin-Chu, TW;
Chung-Hu Ke, Taipei, TW;
Chih-Hsin Ko, Fongshan, TW;
Hung-Wei Chen, Hsinchu, TW;
Wen-Chin Lee, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method for forming a semiconductor structure includes: providing a semiconductor substrate; forming an NMOS device at a surface of the semiconductor substrate, which comprises forming a first source/drain electrode on a first source/drain region of the NMOS device, wherein the first source/drain electrode has a first barrier height; forming a PMOS device at the surface of the semiconductor substrate comprising forming a second source/drain electrode on a second source/drain region of the PMOS device, wherein the second source/drain electrode has a second barrier height, and wherein the first barrier height is different from the second barrier height; forming a first stressed film having a first intrinsic stress over the NMOS device; and forming a second stressed film having a second intrinsic stress over the PMOS device, wherein the first intrinsic stress is more tensile than the second intrinsic stress.