The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2011

Filed:

Dec. 01, 2009
Applicants:

Do-jae Yoo, Seoul, KR;

Young-do Kweon, Seoul, KR;

Seog-moon Choi, Seoul, KR;

Bum-sik Jang, Seongnam-si, KR;

Tae-sung Jeong, Hwaseong-si, KR;

Inventors:

Do-Jae Yoo, Seoul, KR;

Young-Do Kweon, Seoul, KR;

Seog-Moon Choi, Seoul, KR;

Bum-Sik Jang, Seongnam-si, KR;

Tae-Sung Jeong, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming at least one bump by performing soldering, on at least one predetermined position electrically connected with the pattern formed on the first substrate; forming a first molding by performing molding, such that the first molding covers the first substrate and the first chip; placing an interposer on the first molding; and placing a second substrate on the interposer, the second substrate having a second chip mounted thereon.


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