The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2011
Filed:
Jun. 11, 2010
Tony Chiang, Mountain View, CA (US);
Gongda Yao, Fremont, CA (US);
Peijun Ding, San Jose, CA (US);
Fusen E. Chen, Cupertino, CA (US);
Barry L. Chin, Saratoga, CA (US);
Gene Y. Kohara, Fremont, CA (US);
Zheng Xu, Foster City, CA (US);
Hong Zhang, Fremont, CA (US);
Tony Chiang, Mountain View, CA (US);
Gongda Yao, Fremont, CA (US);
Peijun Ding, San Jose, CA (US);
Fusen E. Chen, Cupertino, CA (US);
Barry L. Chin, Saratoga, CA (US);
Gene Y. Kohara, Fremont, CA (US);
Zheng Xu, Foster City, CA (US);
Hong Zhang, Fremont, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
We disclose a method of depositing a metal seed layer on a wafer substrate comprising a plurality of recessed device features. The method comprises depositing a first portion of a copper seed layer on a wafer substrate without excessive build-up on the openings of each of the plurality of recessed device features, while obtaining bottom coverage without substantial sputtering of the bottom surface. The method also comprises depositing a second portion of the metal seed layer while redistributing at least a portion of the bottom coverage material to the sidewalls of each recessed device feature, to provide a uniform seed layer coverage over the interior surface of the recessed device features.