The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2011

Filed:

Jun. 28, 2010
Applicants:

Jeff Jianhui YE, Bristow, VA (US);

Huang Liu, Singapore, SG;

Alex K H See, Singapore, SG;

Wei LU, Singapore, SG;

Hai Cong, Singapore, SG;

Hui Peng Koh, Singapore, SG;

Mei Sheng Zhou, Singapore, SG;

Liang Choo Hsia, Singapore, SG;

Inventors:

Jeff Jianhui Ye, Bristow, VA (US);

Huang Liu, Singapore, SG;

Alex K H See, Singapore, SG;

Wei Lu, Singapore, SG;

Hai Cong, Singapore, SG;

Hui Peng Koh, Singapore, SG;

Mei Sheng Zhou, Singapore, SG;

Liang Choo Hsia, Singapore, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for forming silicide contacts in integrated circuits (ICs) is described. A spacer pull-back etch is performed during the salicidation process to reduce the stress between the spacer and source/drain silicide contact at the spacer undercut. This prevents the propagation of surface defects into the substrate, thereby minimizing the occurrence of silicide pipe defects. The spacer pull-back etch can be performed after a first annealing step to form the silicide contacts.


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