The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2011

Filed:

Apr. 29, 2009
Applicants:

Wen-yuan Chang, Taipei Hsien, TW;

Wei-cheng Chen, Taipei Hsien, TW;

Yeh-chi Hsu, Taipei Hsien, TW;

Inventors:

Wen-Yuan Chang, Taipei Hsien, TW;

Wei-Cheng Chen, Taipei Hsien, TW;

Yeh-Chi Hsu, Taipei Hsien, TW;

Assignee:

VIA Technologies, Inc., Taipei Hsien, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A fabrication method of a circuit board is provided. A substrate, a top pad, a base pad electrically connecting the top pad, and a top and a base solder resist layers are provided. The top and the base pads are disposed on two opposite surfaces of the substrate, respectively. The top solder resist layer having a first opening partially exposing the top pad and the base solder resist layer having a second opening partially exposing the base pad are disposed on the two surfaces, respectively. A conductive layer covering the base solder resist layer and the base pad is formed. A plating resist layer having a third opening is formed on the conductive layer. A current is applied to the conductive layer through the third opening for electroplating a pre-bump on the top pad. The plating resist layer and the conductive layer are then removed.


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