The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2010

Filed:

Jul. 31, 2006
Applicants:

Mitsuaki Katagiri, Tokyo, JP;

Takashi Iida, Yokohama, JP;

Hiroya Shimizu, Ryugasaki, JP;

Satoshi Isa, Tokyo, JP;

Inventors:

Mitsuaki Katagiri, Tokyo, JP;

Takashi Iida, Yokohama, JP;

Hiroya Shimizu, Ryugasaki, JP;

Satoshi Isa, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

System, method and program for inductance analysis for reducing time for analysis, to cope with increase in the system size, to achieve high accuracy in the analysis. Information on a power supply plane, in a state in which a beginning point of non-coupled current of return current accompanying a signal current is placed in the vicinity of a signal through-hole on the power supply plane, based on position information of said signal through-hole, is received. Potential distribution in the power supply plane is determined and output. The non-coupled inductance from the signal through-hole to the power supply through-hole in the power supply plane is evaluated. In the potential analysis, non-coupled inductance L from the signal through-hole to the power supply through-hole is represented by resistance R. The relationship that a voltage increment ΔV is represented by the product of the non-coupled inductance L and the rate of time change of the current, ΔV=LΔI/Δt, is replaced by the relationship that the voltage V is represented by the product of resistance R and non-coupled current I, V=R×I. Potential analysis is performed by analyzing two-dimensional heat diffusion in the power supply plane assuming that a heat source is placed at a beginning point of the non-coupled current.


Find Patent Forward Citations

Loading…