The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2010
Filed:
Mar. 05, 2009
Shusuke Kaya, Tokyo, JP;
Seikoh Yoshida, Tokyo, JP;
Masatoshi Ikeda, Legal Representative, Tokyo, JP;
Sadahiro Kato, Tokyo, JP;
Takehiko Nomura, Tokyo, JP;
Nariaki Ikeda, Tokyo, JP;
Masayuki Iwami, Tokyo, JP;
Yoshihiro Sato, Tokyo, JP;
Hiroshi Kambayashi, Tokyo, JP;
Yuki Niiyama, Tokyo, JP;
Shusuke Kaya, Tokyo, JP;
Seikoh Yoshida, Tokyo, JP;
Masatoshi Ikeda, legal representative, Tokyo, JP;
Sadahiro Kato, Tokyo, JP;
Takehiko Nomura, Tokyo, JP;
Nariaki Ikeda, Tokyo, JP;
Masayuki Iwami, Tokyo, JP;
Yoshihiro Sato, Tokyo, JP;
Hiroshi Kambayashi, Tokyo, JP;
Yuki Niiyama, Tokyo, JP;
Furukawa Electric Co., Ltd., Tokyo, JP;
Abstract
The field effect transistor includes a laminated structure in which a buffer layer, and an electron transporting layer (undoped GaN layer), and an electron supplying layer (undoped AlGaN layer) are laminated in sequence on a sapphire substrate. An npn laminated structure is formed on a source region of the electron supplying layer, and a source electrode is formed on the npn laminated structure. A drain electrode is formed in a drain region of the electron supplying layer, and an insulating film is formed in an opening region formed in the gate region. When a forward voltage greater than a threshold is applied to the gate electrode, an inversion layer is formed and the drain current flows. By changing a thickness and an impurity concentration of the p-type GaN layer, the threshold voltage can be controlled. The electrical field concentration between the gate electrode and the drain electrode is relaxed due to the drift layer, and voltage resistance improves.