The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2010

Filed:

Dec. 01, 2006
Applicants:

Clifford Fishley, San Jose, CA (US);

Abiola Awujoola, Pleasanton, CA (US);

Leonard Mora, San Jose, CA (US);

Amar Amin, Milpitas, CA (US);

Maurice Othieno, Union City, CA (US);

Chok J. Chia, Cupertino, CA (US);

Inventors:

Clifford Fishley, San Jose, CA (US);

Abiola Awujoola, Pleasanton, CA (US);

Leonard Mora, San Jose, CA (US);

Amar Amin, Milpitas, CA (US);

Maurice Othieno, Union City, CA (US);

Chok J. Chia, Cupertino, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit package includes a package substrate, a die attach pad formed on the package substrate for securing a die to the package substrate, a ground bonding ring formed on the package substrate for attaching core and I/O ground bond wires between the die and the package substrate, and a first plurality of bond fingers formed immediately adjacent to the ground bonding ring for attaching a first set of I/O signal bond wires between the package substrate and the die.


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