The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
Jun. 04, 2008
Ho-jin Lee, Seoul, KR;
Nam-seog Kim, Gyeonggi-do, KR;
Yong-chai Kwon, Gyeonggi-do, KR;
Hyun-soo Chung, Gyeonggi-do, KR;
In-young Lee, Gyeonggi-do, KR;
Son-kwan Hwang, Gyeonggi-do, KR;
Ho-Jin Lee, Seoul, KR;
Nam-Seog Kim, Gyeonggi-do, KR;
Yong-Chai Kwon, Gyeonggi-do, KR;
Hyun-Soo Chung, Gyeonggi-do, KR;
In-Young Lee, Gyeonggi-do, KR;
Son-Kwan Hwang, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd., Yeongtong-gu, Suwon-si Gyeonggi-do, KR;
Abstract
A semiconductor device having a through electrode and a method of fabricating the same are disclosed. In one embodiment, a semiconductor device includes a first insulating layer formed on a semiconductor substrate. A wiring layer having a first aperture to expose a portion of the first insulating layer is formed on the first insulating layer. A second insulating layer is formed on an upper portion of the wiring layer and in the first aperture. A conductive pad having a second aperture to expose a portion of the second insulating layer is formed on the second insulating layer. A through hole with a width narrower than widths of the first and second apertures is formed through the first and second insulating layers and an upper portion of the semiconductor substrate. A through electrode is formed in the through hole.