The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 2010
Filed:
Mar. 10, 2004
Anthony Dip, Cedar Creek, TX (US);
Pradip K. Roy, Orlando, FL (US);
Sanjeev Kaushal, Austin, TX (US);
Allen J. Leith, Austin, TX (US);
Seungho OH, Austin, TX (US);
Raymond Joe, Austin, TX (US);
Anthony Dip, Cedar Creek, TX (US);
Pradip K. Roy, Orlando, FL (US);
Sanjeev Kaushal, Austin, TX (US);
Allen J. Leith, Austin, TX (US);
Seungho Oh, Austin, TX (US);
Raymond Joe, Austin, TX (US);
Tokyo Electron Limited, Tokyo, JP;
Abstract
A method for using a silicon germanium (SiGe) surface layer to integrate a high-k dielectric layer into a semiconductor device. The method forms a SiGe surface layer on a substrate and deposits a high-k dielectric layer on the SiGe surface layer. An oxide layer, located between the high-k dielectric layer and an unreacted portion of the SiGe surface layer, is formed during one or both of deposition of the high-k dielectric layer and an annealing process after deposition of the high-k dielectric layer. The method further includes forming an electrode layer on the high-k dielectric layer.