The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2010

Filed:

Sep. 30, 2002
Applicants:

Srikanteswara Dakshina-murthy, Austin, TX (US);

Paul R. Besser, Austin, TX (US);

Jonathan B. Smith, Fremont, CA (US);

Eric M. Apelgren, Austin, TX (US);

Christian Zistl, Dresden, DE;

Jeremy I. Martin, Austin, TX (US);

Lie Larry Zhao, Austin, TX (US);

Nicholas John Kepler, Saratoga, CA (US);

Inventors:

Srikanteswara Dakshina-Murthy, Austin, TX (US);

Paul R. Besser, Austin, TX (US);

Jonathan B. Smith, Fremont, CA (US);

Eric M. Apelgren, Austin, TX (US);

Christian Zistl, Dresden, DE;

Jeremy I. Martin, Austin, TX (US);

Lie Larry Zhao, Austin, TX (US);

Nicholas John Kepler, Saratoga, CA (US);

Assignee:

Globalfoundries Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises defining a photoresist feature having a first size in a layer of photoresist that is formed above a layer of dielectric material. The method further comprises reducing the first size of the photoresist feature to produce a reduced size photoresist feature, forming an opening in the layer of dielectric material under the reduced size photoresist feature, and forming a conductive material in the opening in the layer of dielectric material.


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