The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7718497 B1

PDF
Full Text
Expired
Date of Patent:
May. 18, 2010

Filed:

May. 30, 2008
Applicants:

Yasushi Akasaka, Yamanashi, JP;

Noriaki Fukiage, Hyogo, JP;

Yoshihiro Kato, Yamanashi, JP;

Kazuhide Hasebe, Yamanashi, JP;

Pao-hwa Chou, Yamanashi, JP;

Inventors:

Yasushi Akasaka, Yamanashi, JP;

Noriaki Fukiage, Hyogo, JP;

Yoshihiro Kato, Yamanashi, JP;

Kazuhide Hasebe, Yamanashi, JP;

Pao-Hwa Chou, Yamanashi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device manufacturing method includes: forming a sidewall spacer on a sidewall surface of a gate electrode; forming a pair of second conductive type source and drain regions in an active region; covering top surfaces of a semiconductor layer, a device isolation region, the sidewall spacer and the gate electrode with a metal film; reducing resistance of the source and drain regions and the gate electrode partially by making the metal film react with the semiconductor layer and the gate electrode; and removing an unreacted portion of the metal film and the sidewall spacer simultaneously by using an etchant which readily etches the unreacted portion of the metal film and the sidewall spacer while hardly etching the device isolation region, resistance-reduced portions of the gate electrode and resistance-reduced portions of the source and drain regions.


Find Patent Forward Citations

Akasaka, Yasushi. (2010). Method for manufacturing semiconductor device (U.S. Patent No. 7718497). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7718497

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