The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2010

Filed:

Nov. 20, 2001
Applicants:

Chih-chien Liu, Taipei, TW;

Ta-shan Tseng, Taipei, TW;

Wen Bin Shieh, Hsin-Chu, TW;

Juan-yuan Wu, Hsin-Chu, TW;

Water Lur, Taipei, TW;

Shih-wei Sun, Taipei, TW;

Inventors:

Chih-Chien Liu, Taipei, TW;

Ta-Shan Tseng, Taipei, TW;

Wen Bin Shieh, Hsin-Chu, TW;

Juan-Yuan Wu, Hsin-Chu, TW;

Water Lur, Taipei, TW;

Shih-Wei Sun, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/467 (2006.01); H01L 21/32 (2006.01); H01L 21/308 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.


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