The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2010
Filed:
Feb. 28, 2007
Won Gi Min, Chandler, AZ (US);
Veronique C. Macary, Chandler, AZ (US);
Jiang-kai Zuo, Chandler, AZ (US);
Won Gi Min, Chandler, AZ (US);
Veronique C. Macary, Chandler, AZ (US);
Jiang-Kai Zuo, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method for forming a microelectronic assembly and a microelectronic assembly are provided. First and second semiconductor devices () are formed over a substrate () having a first dopant type at a first concentration. First and second buried regions () having a second dopant type are formed respectively below the first and second semiconductor devices with a gap () therebetween. At least one well region () is formed over the substrate and between the first and second semiconductor devices. A barrier region () having the first dopant type at a second concentration is formed between and adjacent to the first and second buried regions such that at least a portion of the barrier region extends a depth () from the first and second semiconductor devices that is greater or equal to the depth of the buried regions.