The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 13, 2010
Filed:
Oct. 15, 2007
Chun-ying Lin, Tainan, TW;
Yu-tang Pan, Tainan, TW;
Shih-wen Chou, Tainan, TW;
Geng-shin Shen, Tainan, TW;
Chun-Ying Lin, Tainan, TW;
Yu-Tang Pan, Tainan, TW;
Shih-Wen Chou, Tainan, TW;
Geng-Shin Shen, Tainan, TW;
Chipmos Technology Inc., Hsinchu, TW;
Abstract
A chip stacked package structure and applications are provided, wherein the chip stacked package structure comprises a substrate, a first chip, a patterned circuit layer and a second chip. The substrate has a first surface and an opposite second surface. The first chip with a first active area and an opposite first rear surface is electrically connected to first surface of substrate by a flip chip bonding process. The patterned circuit layer set on the dielectric layer is electrically connected to the substrate via a bonding wire. The second chip set on the patterned circuit layer has a second active area and a plurality of second pads formed on the second active area, wherein the second bonding pad is electrically connected to the patterned circuit layer.