The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2010

Filed:

Oct. 04, 2007
Applicants:

Hai-ching Chen, Hsinchu, TW;

Sunil Kumar Singh, Hsin-Chu, TW;

Tien-i Bao, Hsin-Chu, TW;

Shau-lin Shue, Hsinchu, TW;

Chen-hua Yu, Hsin-Chu, TW;

Inventors:

Hai-Ching Chen, Hsinchu, TW;

Sunil Kumar Singh, Hsin-Chu, TW;

Tien-I Bao, Hsin-Chu, TW;

Shau-Lin Shue, Hsinchu, TW;

Chen-Hua Yu, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present disclosure provides a method for fabricating an integrated circuit. The method includes forming an energy removable film (ERF) on a substrate; forming a first dielectric layer on the ERF; patterning the ERF and first dielectric layer to form a trench in the ERF and the first dielectric layer; filling a conductive material in the trench; forming a ceiling layer on the first dielectric layer and conductive material filled in the trench; and applying energy to the ERF to form air gaps in the ERF after the forming of the ceiling layer.


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