The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2010

Filed:

Mar. 27, 2008
Applicants:

Jung-hun Sung, Yongin-si, KR;

Kwang-soo Seol, Suwon-si, KR;

Woong-chul Shin, Daejeon, KR;

Sang-jin Park, Pyeongtaek-si, KR;

Sang-moo Choi, Yongin-si, KR;

Inventors:

Jung-hun Sung, Yongin-si, KR;

Kwang-soo Seol, Suwon-si, KR;

Woong-chul Shin, Daejeon, KR;

Sang-jin Park, Pyeongtaek-si, KR;

Sang-moo Choi, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile memory devices include a charge trap layer on a semiconductor substrate and storing electrons, a pad oxide layer on the first charge trap layer, and a second trap layer on the pad oxide layer and storing electrons. In a programming mode in which data is written, the stored electrons are moved between a first position of the first charge trap layer and a first position of the second charge trap layer through the pad oxide layer or between a second position of the first charge trap layer and a second position of the second charge trap layer through the pad oxide layer.


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