The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2010
Filed:
Apr. 30, 2007
Kwan-yong Lim, Ichon-shi, KR;
Heung-jae Cho, Ichon-shi, KR;
Yong-soo Kim, Ichon-shi, KR;
Se-aug Jang, Ichon-shi, KR;
Hyun-chul Sohn, Ichon-shi, KR;
Kwan-Yong Lim, Ichon-shi, KR;
Heung-Jae Cho, Ichon-shi, KR;
Yong-Soo Kim, Ichon-shi, KR;
Se-Aug Jang, Ichon-shi, KR;
Hyun-Chul Sohn, Ichon-shi, KR;
Hynix Semiconductor, Inc., Gyeonggi-do, KR;
Abstract
The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers.