The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 2009
Filed:
Sep. 27, 2007
Hsu Kai Yang, Pleasanton, CA (US);
Lejan Pu, San Jose, CA (US);
Perng-fei Yuh, San Jose, CA (US);
Po-kang Wang, San Jose, CA (US);
Hsu Kai Yang, Pleasanton, CA (US);
Lejan Pu, San Jose, CA (US);
Perng-Fei Yuh, San Jose, CA (US);
Po-Kang Wang, San Jose, CA (US);
MagIC Technologies, Inc., Milpitas, CA (US);
Abstract
Voltage and current stress for magnetic random access memory (MRAM) cells can weed out potential early failure cells. Method and circuit implementation of such a stress test for a MRAM comprise coupling a stress test circuit to the read bus of the MRAM and stressing the Magnetic Tunnel Junctions (MTJS) by tying them to ground by activating isolation transistors associated with them. Read word lines control which MTJs are stressed Both the method and implementation can be used for any memory cells based on resistance differences, such as Phase RAM or Spin Valve MRAM.