The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2009

Filed:

Apr. 21, 2005
Applicants:

Shun-li Lin, Hsinchu, TW;

Chen-fu Chien, Hsinchu, TW;

Chia-yu Hsu, Hsinchu, TW;

I-pien Wu, Hsinchu, TW;

Inventors:

Shun-Li Lin, Hsinchu, TW;

Chen-Fu Chien, Hsinchu, TW;

Chia-Yu Hsu, Hsinchu, TW;

I-Pien Wu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01B 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for analyzing overlay errors in lithography is described. Interfield sampling and intrafield sampling are first conducted to sample multiple positions on each of the wafers, and then the overlay error value at each of the positions is measured. An overlay error model including coefficients of intrafield and interfield overlay errors of different types is used to fit the measured overlay error values with respect to the sampled positions. In the overlay error model, the intrafield overlay errors include intrafield translation, isotropic magnification, reticle rotation, asymmetric magnification and asymmetric rotation, and the interfield overlay errors include interfield translation, scale error, wafer rotation and orthogonality error.


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