The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2009
Filed:
Dec. 01, 2006
Belgacem Haba, Saratoga, CA (US);
Masud Beroz, Cary, NC (US);
Ronald Green, San Jose, CA (US);
Ilyas Mohammed, Santa Clara, CA (US);
Stuart E. Wilson, Menlo Park, CA (US);
Wael Zohni, San Jose, CA (US);
Yoichi Kubota, Pleasanton, CA (US);
Jesse Burl Thompson, Brentwood, CA (US);
Belgacem Haba, Saratoga, CA (US);
Masud Beroz, Cary, NC (US);
Ronald Green, San Jose, CA (US);
Ilyas Mohammed, Santa Clara, CA (US);
Stuart E. Wilson, Menlo Park, CA (US);
Wael Zohni, San Jose, CA (US);
Yoichi Kubota, Pleasanton, CA (US);
Jesse Burl Thompson, Brentwood, CA (US);
Tessera, Inc., San Jose, CA (US);
Abstract
A microelectronic assembly includes a microelectronic package having a microelectronic element with faces and contacts, a flexible substrate spaced from and overlying a first face of the microelectronic element, and a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, at least some of the conductive posts being electrically interconnected with the microelectronic element. The package includes a plurality of support elements disposed between the microelectronic element and the substrate and supporting the flexible substrate over the microelectronic element. At least some of the conductive posts are offset from the support elements. The assembly includes a circuitized substrate having conductive pads confronting the conductive posts of the microelectronic package, whereby the conductive posts are electrically interconnected with the conductive pads.