The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2009

Filed:

Oct. 22, 2007
Applicants:

Abhijit Basu Mallick, Palo Alto, CA (US);

Jeffrey C. Munro, Houston, TX (US);

Linlin Wang, San Jose, CA (US);

Srinivas D. Nemani, Sunnyvale, CA (US);

Yi Zheng, San Jose, CA (US);

Zheng Yuan, Fremont, CA (US);

Dimitry Lubomirsky, Cupertino, CA (US);

Ellie Y. Yieh, San Jose, CA (US);

Inventors:

Abhijit Basu Mallick, Palo Alto, CA (US);

Jeffrey C. Munro, Houston, TX (US);

Linlin Wang, San Jose, CA (US);

Srinivas D. Nemani, Sunnyvale, CA (US);

Yi Zheng, San Jose, CA (US);

Zheng Yuan, Fremont, CA (US);

Dimitry Lubomirsky, Cupertino, CA (US);

Ellie Y. Yieh, San Jose, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/469 (2006.01); H01L 21/31 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

Published as:
US2009104789A1; KR20090040851A; EP2053640A2; CN101425461A; SG152169A1; US7541297B2; JP2009152551A; TW200933739A; CN101425461B; KR101019768B1; TWI351061B; EP2053640A3; JP2013239752A;

Find Patent Forward Citations

Mallick, Abhijit. (2009). Method and system for improving dielectric film quality for void free gap fill (U.S. Patent No. 7541297). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7541297

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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