Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby

Abstract

A through hole () is formed in a wafer () comprising a semiconductor substrate (). A seed layer () is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor () is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric () is formed in an opening in a semiconductor substrate () by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed () is formed on the bottom by electroless plating. A conductor () is electroplated on the seed. In another embodiment, a dielectric () is formed in the opening to cover the entire surface of the opening. A non-conformal layer () is deposited by PVD over the sidewalls but not the bottom of the opening. The dielectric () is etched off the bottom with the non-conformal layer () as a mask. A seed () is formed on the bottom by electroless plating. The non-conformal layer can be formed by electroplating. It can be tantalum deposited by electroplating, then anodized. Other embodiments are also provided.