The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2009
Filed:
Aug. 03, 2006
John Michael Cotte, New Fairfield, CT (US);
Brian Paul Gaucher, New Milford, CT (US);
Janusz Grzyb, Pfaffikon, CH;
Nils Deneke Hoivik, Pleasantville, NY (US);
Christopher Vincent Jahnes, Upper Saddle River, NJ (US);
John Ulrich Knickerbocker, Monroe, NY (US);
Duixian Liu, Scarsdale, NY (US);
John Harold Magerlein, Yorktown Heights, NY (US);
Chirag Suryakant Patel, Peekskill, NY (US);
Ullrich R. Pfeiffer, Yorktown Heights, NY (US);
Cornelia Kang-i Tsang, Mohegan Lake, NY (US);
John Michael Cotte, New Fairfield, CT (US);
Brian Paul Gaucher, New Milford, CT (US);
Janusz Grzyb, Pfaffikon, CH;
Nils Deneke Hoivik, Pleasantville, NY (US);
Christopher Vincent Jahnes, Upper Saddle River, NJ (US);
John Ulrich Knickerbocker, Monroe, NY (US);
Duixian Liu, Scarsdale, NY (US);
John Harold Magerlein, Yorktown Heights, NY (US);
Chirag Suryakant Patel, Peekskill, NY (US);
Ullrich R. Pfeiffer, Yorktown Heights, NY (US);
Cornelia Kang-I Tsang, Mohegan Lake, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An apparatus is described incorporating an interposer having a cavity for a portion of an antenna structure, having conductor through vias, a top Si part having interconnection wiring and having pads for electrically mounting an integrated circuit chip thereon, wherein the top Si part mates with the interposer electrically and mechanically. The interposer and top Si part may be scaled to provide an array of functional units. The invention overcomes the problem of combining a high efficient antenna with integrated circuit chips in a Si package with signal frequencies from 1 to 100 GHz and the problem of shielding components proximate to the antenna and reduces strain arising from mismatching of TCEs.